#include <msp430.h>
#include "hardware.h"
#include "string.h"
#include "uart.h"
#include "usart.h"
extern StrSingleWire  StrWire;
extern char *report_status;    ///////�ϱ�״̬�ַ���
extern u16  status;
extern u16  flag;
extern u16   wireram;
extern  u8 mystatus;
u16     rtcvalue=0;
unsigned int ADC_Result;
struct_sys str_node;
unsigned long  readdt=12;
struct_sys *pnode;
unsigned long *FRAM_write_ptr;
extern u8 count_Failure;
extern u8 data_10;
u16 data_100=0;
u8 count_qy=0;////Ƿѹ����
u8 Under_voltage=0;////Ƿѹ��־
u8 Under_voltage1=0;
u8 count_qy1=0;////Ƿѹ����
unsigned long  reserved1;                   //FRAM����1
u8 memory=0;

/*
P1.0-----BAT_CTRL            P2.0---------COM_OUT
P1.1-----BAT_ADC             P2.1---------COM_IN      IN
P1.2-----KEY        IN       P2.2---------RF_P1       in   
P1.3-----RF_RST              P2.3---------RF_WAKE         
P1.4-----RF_BUSY    IN       P2.4---------RF_STAT     IN    
P1.5-----RF_MODE             P2.5---------RF_P0       in      
P1.6-----MCU_RXD    IN       P2.6---------LED_DATA
P1.7-----MCU_TXD             P2.7---------LED_FAULT 

*/
void IOInit(void)
{ 
   SYSCFG0 = FRWPPW | PFWP;
   P1DIR=0XAC;   //////1010 1100
   P2DIR=0XCF;   /////1100 1111
   P1OUT=0;
   P2OUT=0XC1;
   RF_MODE_HIGH;       ///////MOEDE:HIGH-LOW ,LOW KEEP  MODE=1;ָ��ģʽ
   __delay_cycles(50000); ////////10ms
   mystatus=0;
}
void AdcInit(void)
{   
   P1SEL0 |= BIT1;
   P1SEL1 |= BIT1;           
   ADCCTL0 &= ~ADCENC;                     // Disable ADC
   ADCCTL0 = ADCSHT_2 | ADCON;             // ADCON, S&H=16 ADC clks
   ADCCTL1 = ADCSHP;                       // ADCCLK = MODOSC; sampling timer
   ADCCTL2&= ~ADCRES;                       // 10-bit conversion results         
   ADCMCTL0 = ADCINCH_1;                    // A1 ADC input select   VREF  to vss         ComInit
}
void  AdcStart(void)
{  
   PMMCTL0_H = PMMPW_H;                    // Unlock the PMM registers
   PMMCTL2 |= INTREFEN;                    // Enable internal reference
   __delay_cycles(2000);                     // Wait for SAC&TRI setup//2mS
   ADCCTL0 |= ADCENC | ADCSC;              // Sampling and conversion start
   ADCIE = ADCIE0;                         // Enable ADC conv complete interrupt
   __bis_SR_register( GIE);
}
void AdcStop(void)
{   
   ADCCTL0 &=~(ADCENC|ADCSC);               // stop  adc
   PMMCTL0_H = PMMPW_H;                    // Unlock the PMM registers
   PMMCTL2 &= ~INTREFEN;                    // DISEnable internal reference
}
void bsp_init(void)
{
   IOInit();                              ///// �˿ڳ�ʼ��       
   PM5CTL0 &= ~LOCKLPM5;                  ///// ���ö˿�����
   __bis_SR_register( GIE);               ///// �����ж� 
   sys_check();                           ///// �ϵ�������      
   usart_init();                          //////���ڳ�ʼ��
   Rf_Rst();                              ///// ����ģ�鿪ʼ��λ
   usart_config();                        //////�������ò���
   RtcInit();                             ///// RTC��ʼ�� 
   AdcInit();                                //////////////!!!!!!
}
void xtal(void)
{
   __bis_SR_register(SCG0);                // disable FLL  ��ֹDCO
   CSCTL3 |= SELREF__REFOCLK;              // Set REFO as FLL reference source 32.768K
   CSCTL0 = 0;                             // clear DCO and MOD registers ���
   CSCTL1 &= ~(DCORSEL_7);                 // Clear DCO frequency select bits first��ֹDCOƵ�ʵ���
   CSCTL1 |= DCORSEL_0;                    // Set DCO = 1MHz  
   CSCTL2 = FLLD_0 + 30;                   // DCODIV = 1MHz
   __delay_cycles(3);                      //��ʱ
   __bic_SR_register(SCG0);                // enable FLL  ʹ��DCO
   while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked
   CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz
}
/////////////////////////////////////////////////////////////////////////////////
void  AdcTask(void)
{
   if((ADC_Result<200)&&(Under_voltage!=18)&&((status&StartTASK)==0))      /////����Ƿѹ  200-3.5V Ƿѹ   225-3.8V    231-4V   186-3.2V 
   { 
      count_qy++;
      if(count_qy==10)
      {
         count_qy=0;
         count_qy1=0;
         Under_voltage=18;
         Under_voltage1=0;
         Sound_OFF;
         Sound_P_ON;
         __delay_cycles(50000);  ////////ms 
         Sound_P_OFF;
         report_status="LAAVFAPP:,BATFAULT";         
         send_ascii(report_status); /////�ϱ�����@͸��ģʽ
         send_ascii_cf();
         count_Failure=0;
         fault_reset=0;
      }
   }
   else if((ADC_Result>=200)&&((status&ZD_GZTASK)==0)&&((status&StartTASK)==0)&&(Under_voltage==18))
   {
      count_qy=0;
      count_qy1=0;
      Under_voltage=0;
      Sound_P_OFF;
      Under_voltage1=0;
      report_status="LAAVFAPP:,NORMAL";
      __delay_cycles(50000);  ////////ms
      send_ascii(report_status); /////�ϱ�����@͸��ģʽ
      send_ascii_cf();
   }   
   else if((ADC_Result<186)&&(status&ZD_GZTASK))
      BAT_OFF;////����ػ�
      if(ADC_Result<60)
      {
         count_qy1++;
         if(count_qy1==2)
         {
            count_qy1=0;
            Under_voltage1=18;
         }
              
      }
}
void FRAMWrite (void)
{   
   SYSCFG0 = FRWPPW;
   *FRAM_write_ptr = reserved1;
   SYSCFG0 = FRWPPW | PFWP;
}
void FRAMRead(void)
{  
   SYSCFG0 = FRWPPW;
   reserved1 =*FRAM_write_ptr;
   SYSCFG0 = FRWPPW | PFWP;
   data_10 = reserved1;             //����                                                       
   memory = reserved1>>8;               //����
}
void sys_check(void)
{ 
   FRAM_write_ptr = (unsigned long *)FRAM_TEST_START;
   FRAMRead();
   if(memory!=0xaa)
   {         
      memory=0xaa;
      data_10=1;
      reserved1=0xaa01;
      FRAM_write_ptr = (unsigned long *)FRAM_TEST_START;
      FRAMWrite();
   }        
}
void  RtcInit(void)
{ 
   RTCMOD = (unsigned int)2800;////3200һ��5����  1024/32768 * 32 = 1 sec.
   RTCCTL = RTCSS__VLOCLK | RTCSR | RTCPS__1000 | RTCIE;
}
/*
rst :
low  >1ms  
high >15ms
*/
void Rf_Rst(void)
{
   RF_RST_ENABLE;   /////low  rst   delay >1ms
   __delay_cycles(2000);////////2ms 
   RF_RST_WORK;   /////high  rst   delay >15ms,��λ���
   __delay_cycles(20000);////////20ms   
}
// ADC interrupt service routine
#pragma vector=ADC_VECTOR
__interrupt void ADC_ISR(void)
{
   if(ADCIV_ADCIFG==(__even_in_range(ADCIV,ADCIV_ADCIFG)))   
      ADC_Result = ADCMEM0;
      status|=ADCTASK;   
      AdcStop();
      //BATCTRLOFF;
      
}
#pragma vector=PORT1_VECTOR
__interrupt void PORT_1(void)
{  
  if(P1IFG&BIT2)                           // P1.2  �жϴ���  
     {        
      P1IFG &= ~BIT2;                     // Clear P1.0 IFG  
     }
}
#pragma vector=PORT2_VECTOR
__interrupt void PORT_2(void)
{  
  if(P2IFG&BIT1)                           // P2.1  �жϴ���  ͨ������
   {        
      TBR=0;      
      TB0CCR0 =26;
      TB0CTL = TBSSEL__ACLK | MC__UP|TBCLR;
      TB0CCTL0 &= ~CCIFG; 
      TB0CCTL0 |= CCIE;     
      StrWire.rxdbit=0;                   /////�ӵ�һλ��ʼ����
      wireram=0;                         //// 
      P2IFG &= ~BIT1;                     // Clear P1.0 IFG  
      P2IE  &= ~BIT1;                    ////���ж�     
   }
}
#pragma vector=RTC_VECTOR
__interrupt void RTC_ISR(void)
{
   switch(__even_in_range(RTCIV,RTCIV_RTCIF))
   {
      case  RTCIV_NONE:   break;          // No interrupt
      case  RTCIV_RTCIF:                  // RTC Overflow     
         data_100++;
         if(data_10==data_100)
         {
            status|=WAKEUP; ////5��������  ����һ����������
            data_100=0;
         }
         break;
      default: break;
   }  
}
